Expand description
Direct Memory Access Controller
Modules
Active Channel and Levels
Descriptor Memory Section Base Address
Busy Channels
Register block
CHANNEL[%s]
CRC Checksum
CRC Control
CRC Data Input
CRC Status
Control
Debug Control
Interrupt Pending
Interrupt Status
Pending Channels
Priority Control 0
Software Trigger Control
Write-Back Memory Section Base Address
Structs
Register block
Register block
Type Definitions
ACTIVE register accessor: an alias for
Reg<ACTIVE_SPEC>BASEADDR register accessor: an alias for
Reg<BASEADDR_SPEC>BUSYCH register accessor: an alias for
Reg<BUSYCH_SPEC>CRCCHKSUM register accessor: an alias for
Reg<CRCCHKSUM_SPEC>CRCCTRL register accessor: an alias for
Reg<CRCCTRL_SPEC>CRCDATAIN register accessor: an alias for
Reg<CRCDATAIN_SPEC>CRCSTATUS register accessor: an alias for
Reg<CRCSTATUS_SPEC>CTRL register accessor: an alias for
Reg<CTRL_SPEC>DBGCTRL register accessor: an alias for
Reg<DBGCTRL_SPEC>INTPEND register accessor: an alias for
Reg<INTPEND_SPEC>INTSTATUS register accessor: an alias for
Reg<INTSTATUS_SPEC>PENDCH register accessor: an alias for
Reg<PENDCH_SPEC>PRICTRL0 register accessor: an alias for
Reg<PRICTRL0_SPEC>SWTRIGCTRL register accessor: an alias for
Reg<SWTRIGCTRL_SPEC>WRBADDR register accessor: an alias for
Reg<WRBADDR_SPEC>