1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
#[doc = "Register `INTENCLR` reader"]
pub struct R(crate::R<INTENCLR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENCLR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENCLR` writer"]
pub struct W(crate::W<INTENCLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENCLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `OVF` reader - Overflow/Underflow Interrupt Disable"]
pub struct OVF_R(crate::FieldReader<bool, bool>);
impl OVF_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
OVF_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for OVF_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `OVF` writer - Overflow/Underflow Interrupt Disable"]
pub struct OVF_W<'a> {
w: &'a mut W,
}
impl<'a> OVF_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u8 & 0x01);
self.w
}
}
#[doc = "Field `ERR` reader - Error Interrupt Disable"]
pub struct ERR_R(crate::FieldReader<bool, bool>);
impl ERR_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
ERR_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for ERR_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `ERR` writer - Error Interrupt Disable"]
pub struct ERR_W<'a> {
w: &'a mut W,
}
impl<'a> ERR_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u8 & 0x01) << 1);
self.w
}
}
#[doc = "Field `DIR` reader - Direction Interrupt Disable"]
pub struct DIR_R(crate::FieldReader<bool, bool>);
impl DIR_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
DIR_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for DIR_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `DIR` writer - Direction Interrupt Disable"]
pub struct DIR_W<'a> {
w: &'a mut W,
}
impl<'a> DIR_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u8 & 0x01) << 2);
self.w
}
}
#[doc = "Field `VLC` reader - Velocity Interrupt Disable"]
pub struct VLC_R(crate::FieldReader<bool, bool>);
impl VLC_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
VLC_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for VLC_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `VLC` writer - Velocity Interrupt Disable"]
pub struct VLC_W<'a> {
w: &'a mut W,
}
impl<'a> VLC_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u8 & 0x01) << 3);
self.w
}
}
#[doc = "Field `MC0` reader - Channel 0 Compare Match Disable"]
pub struct MC0_R(crate::FieldReader<bool, bool>);
impl MC0_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
MC0_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for MC0_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MC0` writer - Channel 0 Compare Match Disable"]
pub struct MC0_W<'a> {
w: &'a mut W,
}
impl<'a> MC0_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u8 & 0x01) << 4);
self.w
}
}
#[doc = "Field `MC1` reader - Channel 1 Compare Match Disable"]
pub struct MC1_R(crate::FieldReader<bool, bool>);
impl MC1_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
MC1_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for MC1_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `MC1` writer - Channel 1 Compare Match Disable"]
pub struct MC1_W<'a> {
w: &'a mut W,
}
impl<'a> MC1_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u8 & 0x01) << 5);
self.w
}
}
impl R {
#[doc = "Bit 0 - Overflow/Underflow Interrupt Disable"]
#[inline(always)]
pub fn ovf(&self) -> OVF_R {
OVF_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - Error Interrupt Disable"]
#[inline(always)]
pub fn err(&self) -> ERR_R {
ERR_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 2 - Direction Interrupt Disable"]
#[inline(always)]
pub fn dir(&self) -> DIR_R {
DIR_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 3 - Velocity Interrupt Disable"]
#[inline(always)]
pub fn vlc(&self) -> VLC_R {
VLC_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 4 - Channel 0 Compare Match Disable"]
#[inline(always)]
pub fn mc0(&self) -> MC0_R {
MC0_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - Channel 1 Compare Match Disable"]
#[inline(always)]
pub fn mc1(&self) -> MC1_R {
MC1_R::new(((self.bits >> 5) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - Overflow/Underflow Interrupt Disable"]
#[inline(always)]
pub fn ovf(&mut self) -> OVF_W {
OVF_W { w: self }
}
#[doc = "Bit 1 - Error Interrupt Disable"]
#[inline(always)]
pub fn err(&mut self) -> ERR_W {
ERR_W { w: self }
}
#[doc = "Bit 2 - Direction Interrupt Disable"]
#[inline(always)]
pub fn dir(&mut self) -> DIR_W {
DIR_W { w: self }
}
#[doc = "Bit 3 - Velocity Interrupt Disable"]
#[inline(always)]
pub fn vlc(&mut self) -> VLC_W {
VLC_W { w: self }
}
#[doc = "Bit 4 - Channel 0 Compare Match Disable"]
#[inline(always)]
pub fn mc0(&mut self) -> MC0_W {
MC0_W { w: self }
}
#[doc = "Bit 5 - Channel 1 Compare Match Disable"]
#[inline(always)]
pub fn mc1(&mut self) -> MC1_W {
MC1_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt Enable Clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
pub struct INTENCLR_SPEC;
impl crate::RegisterSpec for INTENCLR_SPEC {
type Ux = u8;
}
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
impl crate::Readable for INTENCLR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
impl crate::Writable for INTENCLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENCLR to value 0"]
impl crate::Resettable for INTENCLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}