Module atsamd_hal::nvm::smart_eeprom
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SmartEEPROM
SmartEEPROM is a feature of NVM controller that simulates a RAM-like memory within a flash. As bits in flash cannot switch from 0 to 1 because of its properties (whole page of memory has to erased and data has to be recopied), SmartEEPROM introduces an indirection mechanism that handles this issue via notion of virtual pages and it handles physical page reallocation and erasing automatically underneath.
From a user perspective, SmartEEPROM behaves just like a piece of memory in RAM but it is non-volatile. Data does not get lost between resets/power cycles.
From technical standpoint, NVM controller sacrifices last
2*8192*NVMCTRL.SEESTAT.SBLK
bytes of flash (in an inactive bank). Memory
access through flash address space will cause HardFault. All accesses has to
be conducted through SmartEEPROM specific address space.
Prerequisites:
Both NVMCTRL.SEESTAT.{SBLK,PSZ}
(block size, virtual page size) are being
populated from proper bits in NVM controller user page on power-on-reset. By
default, SBLK
property is set to 0
, effectively disabling SmartEEPROM.
One of possible safe ways to change user page content is to use OpenOCD
custom commands. atsame5x
’s OpenOCD
driver supports atsame5 userpage
command. To access it from GDB, it has to be preceded with a monitor
clause.
To access SmartEeprom
struct, call Nvm::smart_eeprom
method to
retrieve its instance.