Type Alias Gendiv

pub type Gendiv = Reg<GendivSpec>;

GENDIV (rw) register accessor: Generic Clock Generator Division

You can read this register and get gendiv::R. You can reset, write, write_with_zero this register using gendiv::W. You can also modify this register. See API.

For information about available fields see gendiv module

Aliased Type

struct Gendiv { /* private fields */ }