atsamd_hal/peripherals/adc/d11/
pin.rs1use crate::adc::*;
2use crate::gpio::pin::*;
3use atsamd_hal_macros::hal_cfg;
4
5macro_rules! adc_pins {
6 (
7 $(
8 $( #[$cfg:meta] )?
9 $PinId:ident: ($Adc:ident, $CHAN:literal)
10 ),+
11 $(,)?
12 ) => {
13 crate::paste::item! {
14 $(
15 $( #[$cfg] )?
16 impl AdcPin<$Adc> for Pin<$PinId, AlternateB> {
17 const CHANNEL: u8 = $CHAN;
18 }
19 )+
20 }
21 };
22}
23
24#[hal_cfg(any("adc-d21"))]
25adc_pins! {
26 #[hal_cfg("pa02")]
27 PA02: (Adc0, 0),
28 #[hal_cfg("pa03")]
29 PA03: (Adc0, 1),
30
31 #[hal_cfg("pb08")]
32 PB08: (Adc0, 2),
33 #[hal_cfg("pb09")]
34 PB09: (Adc0, 3),
35
36 #[hal_cfg("pa04")]
37 PA04: (Adc0, 4),
38 #[hal_cfg("pa05")]
39 PA05: (Adc0, 5),
40 #[hal_cfg("pa06")]
41 PA06: (Adc0, 6),
42 #[hal_cfg("pa07")]
43 PA07: (Adc0, 7),
44
45 #[hal_cfg("pb00")]
46 PB00: (Adc0, 8),
47 #[hal_cfg("pb01")]
48 PB01: (Adc0, 9),
49 #[hal_cfg("pb02")]
50 PB02: (Adc0, 10),
51 #[hal_cfg("pb03")]
52 PB03: (Adc0, 11),
53
54 #[hal_cfg("pb04")]
55 PB04: (Adc0, 12),
56 #[hal_cfg("pb05")]
57 PB05: (Adc0, 13),
58 #[hal_cfg("pb06")]
59 PB06: (Adc0, 14),
60 #[hal_cfg("pb07")]
61 PB07: (Adc0, 15),
62
63 #[hal_cfg("pa08")]
64 PA08: (Adc0, 16),
65 #[hal_cfg("pa09")]
66 PA09: (Adc0, 17),
67 #[hal_cfg("pa10")]
68 PA10: (Adc0, 18),
69 #[hal_cfg("pa11")]
70 PA11: (Adc0, 19),
71}
72
73#[hal_cfg(any("adc-d11"))]
74adc_pins! {
75 #[hal_cfg("pa02")]
76 PA02: (Adc0, 0),
77 #[hal_cfg("pa03")]
78 PA03: (Adc0, 1),
79 #[hal_cfg("pa04")]
80 PA04: (Adc0, 2),
81 #[hal_cfg("pa05")]
82 PA05: (Adc0, 3),
83 #[hal_cfg("pa06")]
84 PA06: (Adc0, 4),
85 #[hal_cfg("pa07")]
86 PA07: (Adc0, 5),
87 #[hal_cfg("pa14")]
88 PA14: (Adc0, 6),
89 #[hal_cfg("pa15")]
90 PA15: (Adc0, 7),
91 #[hal_cfg("pa10")]
92 PA10: (Adc0, 8),
93 #[hal_cfg("pa11")]
94 PA11: (Adc0, 9),
95}